Ponencia “Designing a GPS receiver: algorithms, processors and co-processors”, 28 noviembre 2018, Madrid

Designing a GPS receiver: algorithms, processors and co-processors

Madhav P. Desai

Miércoles 28 de Noviembre de 2018, 12:30

Salón de Grados

Escuela Politécnica Superior

Universidad CEU San Pablo


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Descripción de la actividad:
Ponencia sobre el diseño y fabricación de un receptor GPS.


A GPS receiver is used to calculate position velocity and time coordinates based on signals transmitted by a system of satellites in orbit around the earth.  In GPS, the satellites are distinguished by the use of orthogonal spreading codes, all being transmitted in a single radio frequency band.  The receiver needs to acquire signals from visible satellites by correlating received signals with these spreading codes.

Acquired satellite signals have to be tracked and the data being transmitted from the satellite needs to be decoded to obtain the position/velocity/time of the receiver.  The design of a base band digital receiver which can acquire and track the available

GPS satellites will be described. The receiver design is a case study in the use of a general-purpose processor in conjunction with a custom co-processor and the partitioning of tasks across these two subsystems.  The custom co-processor is needed to implement the large number of correlations that need to be performed during acquisition and tracking.  The evolution of such a receiver design and

the trade-offs involved will be explained.

About the speaker

Madhav P. Desai holds a degree in Electrical Engineering from IIT Bombay and a PhD degree from University of Illinois in Urbana-Champaign.  During the period 1992-1996 he was with the Semiconductor Engineering Group of Digital Equipment Corporation in Hudson, MA, where he worked as Principal Engineer developing two of the fastest CMOS microprocessors in history. Currently, he is a Full Professor at the Department of Electrical Engineering, Indian Institute of Technology, Bombay.  His research lines cover VLSI design, circuits and systems, and combinatorial algorithms.


INF./RESERVA : La charla es gratuita, pero es necesario hacer reserva escribiendo al email gabriel.caffarena@ceu.es. La actividad no se llevará a cabo si no hay un número mínimo de asistentes


Escuela Politécnica Superior. Universidad San Pablo CEU / Tecnologías de la Información